IDT49FCT805PYB

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1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.  This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  Exposure to absolute maximum rating conditions for extended periods may affect reliability.  No terminal voltage may exceed V_CC by +0.5V unless otherwise noted.
2.Input and V_CC terminals.
3.Output and I/O terminals.

The IDT49FCT805PYB are clock drivers built using advanced dual metal CMOS technology. The IDT49FCT805/A is a non-inverting clock driver and the IDT49FCT806/A is an inverting clock driver. Each device consists of two banks of drivers. Each bank drives five output buffers from a standard TTL compatible  input.  The devices feature a "heartbeat" monitor for diagnostics and PLL driving.

The MON output of the IDT49FCT805PYB is identical to all other outputs and complies with the output specifications in this document.  The IDT49FCT805/A and IDT49FCT806/A offer low capacitance inputs with hysteresis.  Rail-to-rail output swing improves noise margin and allows easy interface with CMOS inputs.