Features: •32-bit wide Flow-thruEDCunit, cascadable to 64 bits•Single-chip 64-bit Generate Mode•Separate system and memory buses•On-chip pipeline latch with external control•Supports bidirectional and common I/O memories•Corrects all single-bit errors•Dete...
IDT49C465: Features: •32-bit wide Flow-thruEDCunit, cascadable to 64 bits•Single-chip 64-bit Generate Mode•Separate system and memory buses•On-chip pipeline latch with external control&...
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Features: • FastDetect Correct - IDT49C460E 10ns (max.) 14ns (max.) - IDT49C460D 12ns (max.)...
Features: • FastDetect Correct - IDT49C460E 10ns (max.) 14ns (max.) - IDT49C460D 12ns (max.)...
Symbol | Rating | Com'l. | . Mil | Unit |
VCC | Power Supply | 0.5 to +7.0 | 0.5 to +7.0 | V |
VTERM | Terminal Voltage with Respect to Ground | 0.5 toVCC + 0.5 | 0.5 toVCC + 0.5 | V |
TA | Operating | 0 to +70 | 55 to +125 | °C |
TBIAS | Temperature Under Bias | 55 to +125 | 65 to +135 | °C |
TSTG | Storage Temperature |
55 to +125 | 65 to +150 | °C |
IOUT | DC Output Current |
30 | 30 | mA |
unit. The chip of the IDT49C465 provides single-error correction and two and It can be expanded to 64-bit widths by cascading 2 units,control. The EDC unit has been designed to be used in either of two configurations in an error correcting memory system. The bidirectional configuration is most appropriate for systems using bidirectional memory buses. A second system configuration utilizes external octal buffers, and is well suited The IDT49C465 supports partial word writes, pipeliningand error diagnostics. It also provides parity protection for data on the system side.