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IDT2309

Features: • Phase-Lock Loop Clock Distribution• 10MHz to 133MHz operating frequency• Distributes one clock input to one bank of five and one bankd of four outputs• Separate output enable for each output bank• Output Skew < 250ps• Low jitter <200 ps cycle-t...

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SeekIC No. : 004371641 Detail

IDT2309: Features: • Phase-Lock Loop Clock Distribution• 10MHz to 133MHz operating frequency• Distributes one clock input to one bank of five and one bankd of four outputs• Separate o...

IDT2309 Data Sheet

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Part Number:
IDT2309
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five and one bankd
   of four outputs
• Separate output enable for each output bank
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• IDT2309-1 for Standard Drive
• IDT2309-1H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Available in SOIC and TSSOP packages


Application

• SDRAM
• Telecom
• Datacom
• PC Motherboards/Workstations
• Critical Path  Delay Designs


Pinout

Connection Diagram


Specifications

Symbol Rating Max. Unit
VDD Supply Voltage Range 0.5 to +4.6 V
VI(2) Input Voltage Range (REF) 0.5 to +5.5 V
VI Input Voltage Range
(except REF) 		0.5 to VDD+0.5 V
IIK (VI < 0) Input Clamp Current 50 mA
IO (VO = 0 to VDD) Continuous Output Current ±50 mA
VDD or GND Continuous Current ±100 mA
TA = 55
(in still air)(3)		 Maximum Power Dissipation 0.7 W
TSTG Storage Temperature Range 65 to +150
Operating
Temperature		 Commercial Temperature
Range		 0 to +70
Operating
Temperature		 Industrial Temperature
Range		 -40 to +85



Description

    The IDT2309 is a high-speed phase-lock loop (PLL) clock buffer,designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

    The IDT2309 is a 16-pin version of the IDT2305. The IDT2309 accepts one reference input, and drives two banks of four low skew clocks. The -1H version of this device operates at up to 133MHz frequency and has higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. In the absence of an input clock, the IDT2309 enters power down, and the outputs are tri-stated. In this mode, the device will draw less than 25µA.

     The IDT2309 is characterized for both Industrial and Commercial operation.

     NOTE: For new designs, refer to AN-233.




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