Features: • Low skew, low jitter PLL clock driver• 1 to 10 differential clock distribution (SSTL_2)• Feedback pins for input to output synchronization• PD# for power management• Spread Spectrum tolerant inputs• Auto PD when input signal removed• Choice of ...
ICS93V857: Features: • Low skew, low jitter PLL clock driver• 1 to 10 differential clock distribution (SSTL_2)• Feedback pins for input to output synchronization• PD# for power manageme...
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Supply Voltage (VDD & AVDD). . . . . . . . . . . -0.5V to 4.6V
Logic Inputs . . . . . . . . . . . . . . .GND - 0.5V to VDD + 0.5V
Ambient Operating Temperature . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . .. -65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.