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ICS93V857

Features: • Low skew, low jitter PLL clock driver• 1 to 10 differential clock distribution (SSTL_2)• Feedback pins for input to output synchronization• PD# for power management• Spread Spectrum tolerant inputs• Auto PD when input signal removed• Choice of ...

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ICS93V857: Features: • Low skew, low jitter PLL clock driver• 1 to 10 differential clock distribution (SSTL_2)• Feedback pins for input to output synchronization• PD# for power manageme...

ICS93V857 Data Sheet

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Part Number:
ICS93V857
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/30

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Product Details

Description



Features:

• Low skew, low jitter PLL clock driver
• 1 to 10 differential clock distribution (SSTL_2)
• Feedback pins for input to output synchronization
• PD# for power management
• Spread Spectrum tolerant inputs
• Auto PD when input signal removed
• Choice of static phase offset available, for easy board tuning;
   -XXX = device pattern number for options listed below.
   - ICS93V857-025 ...... 0ps
   - ICS93V857-125 +125ps
   - ICS93V857-130 .. +40ps


Pinout

Connection Diagram


Specifications

Supply Voltage (VDD & AVDD). . . . . . . . . . . -0.5V to 4.6V
Logic Inputs . . . . . . . . . . . . . . .GND - 0.5V to VDD + 0.5V
Ambient Operating Temperature . . . . . . 0°C to +85°C
Storage Temperature . . . . . . . . . . . .. -65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.




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