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ICS9248-134

Features: • 3 - CPUs @ 2.5V, up to 180MHz.• 1 - CPU/2 @ 2.5V.• 3 - IOAPIC @ 2.5V, PCI or PCI/2• 3 - 3V66MHz @ 3.3V.• 11 - PCIs @ 3.3V• 1 - 48MHz, @ 3.3V fixed• 1 - 24/48MHz, @ 3.3V• Support power management: Power down Mode from I2C programming.̶...

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SeekIC No. : 004371229 Detail

ICS9248-134: Features: • 3 - CPUs @ 2.5V, up to 180MHz.• 1 - CPU/2 @ 2.5V.• 3 - IOAPIC @ 2.5V, PCI or PCI/2• 3 - 3V66MHz @ 3.3V.• 11 - PCIs @ 3.3V• 1 - 48MHz, @ 3.3V fixedR...

ICS9248-134 Data Sheet

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Part Number:
ICS9248-134
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 3 - CPUs @ 2.5V, up to 180MHz.
• 1 - CPU/2 @ 2.5V.
• 3 - IOAPIC @ 2.5V, PCI or PCI/2
• 3 - 3V66MHz @ 3.3V.
• 11 - PCIs @ 3.3V
• 1 - 48MHz, @ 3.3V fixed
• 1 - 24/48MHz, @ 3.3V
• Support power management: Power down Mode from I2C programming.
• Spread spectrum for EMI control ± 0.25% center spread).
• Uses external 14.318MHz crystal


Pinout

Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Logic Inputs . . . . . . . . . .  . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature .. . . . 0°C to +70°C
Storage Temperature . . . . . . . . .  65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . 115°C


Description

The ICS9248-134 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9212-01.

Spread Spectrum of the ICS9248-134 may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9248-134 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature
variations.

The CPU/2 clocks are inputs to the DRCG.




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