Features: • Generates four processor and seven synchronous bus clocks plus graphic,
floppy, keyboard and reference clocks
• Selectable 33.3/50/60/66.6/80 MHz PCLKs
• ±150ps maximum PowerPC PLL in-band jitter
• All synchronous clocks skew matched to ±250ps
• Individual or group stop-clock control
• Power-down modes minimize standby current
• Custom configurations available
• 3.0V - 5.5 supply range
• 32-pin SOIC package
Pinout
SpecificationsSupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .................................. 7.0 V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND 0.5 V to VDD +0.5 V
Ambient Operating Temperature . . . . . . . . . . ........................ . 0 to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . ......... . . . 65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
DescriptionThe ICS9160-03 generates all clocks required for high speed RISC microprocessor systems based on the PowerPC 603 and 604. Five different frequency multiplying factors are selectable
and offer smooth frequency transitions. BCLK signals are synchronous to PCLK and operate at PCLK/2 for optimumsynchronous PCI bus performance. The multiplying and ratio factors can be customed for specific applications.
Both individual and group glitch-free stop of the ICS9160-03 and start ofthe clock signals are provided, as well as a power-down mode to mize power consumption. The individual stop and start is provided through a serial interface control.
A global output of the ICS9160-03 enable pin simplifies production board testing, and a test mode is available to aid in system design and diagnostics.
ICS9160-03 Data Sheet
