ICS9158-05

AVDD, VDD referenced to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Operating temperature under bias. . . . . . . . . . . . . . .0°C to +70°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . -40°C to +150°C
Voltage on I/O pins referenced to GND. . . .  GND -0.5V to VDD +0.5V
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  0.5 Watts
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.

The ICS9158-05 is a low cost frequency generator designed specifically to clock Pentium systems using the Triton chip set. Three copies of the CPU clock are available at 50, 60, or 66.7 MHz. Five copies of the synchronous BUS clock run at half the CPU frequency. A 14.318 MHz REFCLK, 12 MHz, KEYBD, and 24 MHz FLOPPY clock are also provided.

Each high drive output of the ICS9158-05 is capable of driving a 30pF load with better than 1V/ns typical slew and have a duty cycle of 50±5%. The synchronous outputs are skew controlled to within ±250ps and CPU clocks lead BUS clocks by 2-5ns.

Glitch-free start and stop of the CPU and BUS clocks of the ICS9158-05 is provided as well as a power-down mode with all clocks forced low and the internal oscillators and PLLs powered-down. Power-up time is less than 10ns. All frequency transitions are gradual and meet the Intel cycle-to-cycle timing specification for 486 and Pentium microprocessors.