ICS2402

Features: • 8-pin SOIC package• Available in Pb (lead) free package• Absolute jitter ±100 ps• Propagation Delay of ±600 ps• Output multiplier of 2X• Output clock frequency up to 80 MHz• Can recover degraded input clock duty cycle• Output clock duty c...

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ICS2402 Picture
SeekIC No. : 004370737 Detail

ICS2402: Features: • 8-pin SOIC package• Available in Pb (lead) free package• Absolute jitter ±100 ps• Propagation Delay of ±600 ps• Output multiplier of 2X• Output clock ...

floor Price/Ceiling Price

Part Number:
ICS2402
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/7

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Product Details

Description



Features:

• 8-pin SOIC package
• Available in Pb (lead) free package
• Absolute jitter ±100 ps
• Propagation Delay of ±600 ps
• Output multiplier of 2X
• Output clock frequency up to 80 MHz
• Can recover degraded input clock duty cycle
• Output clock duty cycle of 45/55
• Full CMOS clock swings with 25 mA drive capability at TTL levels
• Advanced, low power CMOS process
• Operating voltage of 3.3 V or 5 V



Pinout

  Connection Diagram


Specifications

Item
Rating
Supply Voltage, VDD

All Inputs and Outputs

Ambient Temperature under Bias

Storage Temperature

Junction Temperature

Power Dissipation
7 V

-0.5 V to VDD+0.5 V

-55 to 125

-65 to +150

125

0.5 W



Description

The ICS2402 is a high-performance Zero Delay Buffer (ZDB) which integrates ICS' proprietary analog/digital Phase-Locked Loop (PLL) techniques. The chip is part of ICS' ClockBlocksTM family and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device.

The ICS2402 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to graphics/video. By allowing off-chip feedback paths, the device can eliminate the delay through other devices.




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