Features: • 8-pin SOIC package• Available in Pb (lead) free package• Absolute jitter ±100 ps• Propagation Delay of ±600 ps• Output multiplier of 2X• Output clock frequency up to 80 MHz• Can recover degraded input clock duty cycle• Output clock duty c...
ICS2402: Features: • 8-pin SOIC package• Available in Pb (lead) free package• Absolute jitter ±100 ps• Propagation Delay of ±600 ps• Output multiplier of 2X• Output clock ...
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Item |
Rating |
Supply Voltage, VDD All Inputs and Outputs Ambient Temperature under Bias Storage Temperature Junction Temperature Power Dissipation |
7 V -0.5 V to VDD+0.5 V -55 to 125 -65 to +150 125 0.5 W |
The ICS2402 is a high-performance Zero Delay Buffer (ZDB) which integrates ICS' proprietary analog/digital Phase-Locked Loop (PLL) techniques. The chip is part of ICS' ClockBlocksTM family and was designed as a performance upgrade to meet today's higher speed and lower voltage requirements. The zero delay feature means that the rising edge of the input clock aligns with the rising edges of both output clocks, giving the appearance of no delay through the device.
The ICS2402 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to graphics/video. By allowing off-chip feedback paths, the device can eliminate the delay through other devices.