Features: • CIF format (352x288) pixels, used with 1/7 optical system.• QVGA format (320x240) pixels, used with 1/7 optical system• QCIF format (176x144) pixels, cropped or subsampled, up to 37.5 fps.• Progressive readout• Output data format: compressed 8-bit raw da...
ICM532B: Features: • CIF format (352x288) pixels, used with 1/7 optical system.• QVGA format (320x240) pixels, used with 1/7 optical system• QCIF format (176x144) pixels, cropped or subsa...
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Symbol |
Parameter |
Rating |
Units | ||
Minimum | Typical | Maximum | |||
VCCA | Absolute Power Supply |
-0.3 | 3.8 | V | |
VINA | Absolute Input Voltage |
-0.3 | VCC + 0.3 | V | |
VOUTA | Absolute Output Voltage |
-0.3 | VCC + 0.3 | V | |
TSTG | Storage Temperature |
0 | 25 | 65 |
ICM532B is a single-chip, CIF resolution, digital color PC camera with integrated data compression, line buffer and Full Speed USB 1.1 interface. All the image processing functions (color interpolation, color correction, auto white balance, auto exposure, auto anti-flickering, sharpening) are performed by software in the host computer. It incorporates a 352x288 sensor array operating at 6 ~ 30 frames per second in progressive manner. Each pixel is covered by a color filter, which forms a "Bayer pattern." Correlated double sampling of the ICM532B is performed by the internal ADC and timing circuitry. The raw data can be adjusted with digital gain. The raw data is compressed using a proprietary compression scheme. The compression allows video out in 8-bit compressed data format through USB 1.1 with 30 frames per second video capability. For higher frame-rates, sub-sampled or cropped QCIF (176x144) modes are available that support 35 frames per second.
8 Pins of the ICM532B are supplied that can be programmed by the driver as general purpose I/O pins, with individually selectable output enables. During power-up, the internal control registers can be loaded from an external serial EEPROM. This allows customization of Vendor ID and Product ID, as well as initialization of other device parameters.
The 48 MHz clock required for the ICM532B is provided by an on-chip phase-lock loop that is driven by an external 6 MHz crystal oscillator. Using a PLL reduces power dissipation, electrical noise and the cost of the crystal. It also reduces the need for EMI shielding that would be required if a 48 MHz oscillator were used.The highest frequency external signal is the 12Mbps on the differential USB data pins