ICL7112

Features: • 12-Bit Resolution and Accuracy• No Missing Codes• Microprocessor Compatible Byte-Organized Buffered Outputs• Auto-Zeroed Comparator for Low Offset Voltage• Low Linearity and Gain Errors• Low Power Consumption (60mW)• No Gain or Offset Adjustmen...

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ICL7112 Picture
SeekIC No. : 004370546 Detail

ICL7112: Features: • 12-Bit Resolution and Accuracy• No Missing Codes• Microprocessor Compatible Byte-Organized Buffered Outputs• Auto-Zeroed Comparator for Low Offset Voltage• ...

floor Price/Ceiling Price

Part Number:
ICL7112
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2025/3/13

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Product Details

Description



Features:

• 12-Bit Resolution and Accuracy
• No Missing Codes
• Microprocessor Compatible Byte-Organized Buffered Outputs
• Auto-Zeroed Comparator for Low Offset Voltage
• Low Linearity and Gain Errors
• Low Power Consumption (60mW)
• No Gain or Offset Adjustment Necessary
• Provides 3% Usable Overrange
• Fast Conversion (40µs)



Pinout

  Connection Diagram


Specifications

Supply Voltage (V+ to DGND) . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Supply Voltage (V- to DGND). . . . . . . . . . . . . . . . . . . +0.3V to -6.5V
VREF, VIN to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +1V to -1V
VREF, VIN, AGND Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Digital I/O Pin Voltages. . . . . . . . . . . . . . . . . . . . . -0.3V to V+ +0.3V
PROG to DGND Voltage . . . . . . . . . . . . . . . . . . . . V- to (V+ +0.3V)



Description

The ICL7112 is a monolithic 12-bit resolution, fast successive approximation A/D converter. It uses thin film resistors and CMOS circuitry combined with an on-chip PROM calibration table to achieve 12-bit linearity without laser trimming. Special design techniques used in the DAC and comparator result in high speed operation, while the fully static silicon-gate CMOS circuitry keeps the power dissipation very low.
Microprocessor bus interfacing is eased by the use of standard memory WRite and ReaD cycle timing and control signals, combined with Chip Select and Address pins. The digital output pins are byte-organized and three-state gated for bus interface to 8-bit and 16-bit systems.
The ICL7112 provides separate Analog and Digital grounds for increased system accuracy. Operating with ±5V supplies, the lCL7112 accepts 0V to +10V input with a -10V reference or 0V to -10V input with a +10V reference.




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