Features: • Fast Page Mode Access Cycle• TTL compatible inputs and outputs• Refresh Interval:-- 1,024 cycles/16 ms• Refresh Mode: RAS-Only,CAS-before-RAS (CBR), and Hidden• JEDEC standard pinout• Single power supply:5V ± 10% or 3.3V ± 10%• Byte Write and B...
IC41LV4105: Features: • Fast Page Mode Access Cycle• TTL compatible inputs and outputs• Refresh Interval:-- 1,024 cycles/16 ms• Refresh Mode: RAS-Only,CAS-before-RAS (CBR), and Hidden...
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Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and ...
Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and ...
Features: `Extended Data-Out (EDO) Page Mode access cycle`TTL compatible inputs and outputs; trist...
Symbol |
Parameters |
Rating |
Unit |
VT |
Voltage on Any Pin Relative to GND 5V 3.3V |
−1.0 to +7.0 −0.5 to +4.6 |
V |
VCC |
Supply Voltage 5V 3.3V |
−1.0 to +7.0 −0.5 to +4.6 |
V |
IOUT |
Output Current |
50 |
mA |
PD |
Power Dissipation |
1 |
W |
TA |
Commercial Operation Temperature |
0 to +70 |
|
TSTG |
Storage Temperature |
−55 to +125 |
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The IC41LV4105 Series is a 1,048,576 x 4-bit high-performance CMOS Dynamic Random Access Memory. The Fast Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 12 ns per 4-bit word.
These features make the IC41LV4105 Series ideally suited for highbandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IC41LV4105 Series is packaged in a 20-pin 300mil SOJ and a 20 pin TSOP-2