Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 1,024 cycles /16 ms• Refresh Mode:RAS-Only, CAS-before-RAS (CBR), and Hidden• JEDEC standard pinout • Single power supply:5V ± 10% (IC4...
IC41LV16100A: Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 1,024 cycles /16 ms• Refresh Mode:RAS-Only, CAS...
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Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and ...
Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and ...
Features: `Extended Data-Out (EDO) Page Mode access cycle`TTL compatible inputs and outputs; trist...
Symbol | Parameters |
Rating |
Unit | |
VT | Voltage on Any Pin Relative to GND |
5V 3.3V |
1.0 to +7.0 0.5 to +4.6 |
V |
VCC | Supply Voltage |
5V 3.3V |
1.0 to +7.0 0.5 to +4.6 |
V |
IOUT | Output Current |
50 |
mA | |
PD | Power Dissipation |
1 |
W | |
TA | Commercial Operation Temperature |
0 to +70 |
||
TSTG | Storage Temperature |
55 to +125 |
The IC41LV16100A are 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the 16100 series ideal for use in 16-, 32-bit wide data bus systems.
These features make the IC41C16100A(S) and IC41LV16100A (S) ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IC41LV16100A are packaged in a 42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2.