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IC41C16256

Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 512 cycles /8 ms• Refresh Mode: RAS-Only,CAS-before-RAS (CBR),Hidden• Single power supply: 5V ± 10% (IC41C16256) 3.3V ± 10% (IC41LV16256)R...

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SeekIC No. : 004370341 Detail

IC41C16256: Features: • Extended Data-Out (EDO) Page Mode access cycle• TTL compatible inputs and outputs; tristate I/O• Refresh Interval: 512 cycles /8 ms• Refresh Mode: RAS-Only,CAS-be...

IC41C16256 Data Sheet

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Part Number:
IC41C16256
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval: 512 cycles /8 ms
• Refresh Mode: RAS-Only,CAS-before-RAS (CBR),Hidden
• Single power supply: 5V ± 10% (IC41C16256) 3.3V ± 10% (IC41LV16256)
• Byte Write and Byte Read operation via two CAS
• Industrail Temperature Range -40oC to 85oC
• Pb-free package is available


Pinout

Connection Diagram


Specifications

Symbol Parameters
Rating
Unit
VT Voltage on Any Pin Relative to GND
5V
3.3V
1.0 to +7.0
0.5 to +4.6
V
VCC Supply Voltage
5V
3.3V
1.0 to +7.0
0.5 to +4.6
V
IOUT Output Current
50
mA
PD Power Dissipation
1
W
TA Commercial Operation Temperature
0 to +70
−40 to +85
TSTG Storage Temperature
−55 to +125
Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.


Description

The ICSI IC41C16256 and IC41LV16256 is a 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories.The IC41C16256 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IC41C16256 ideal for use in 16-, 32-bit wide data bus systems.

These features make the IC41C16256and IC41LV16256 ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.

The IC41C16256 is packaged in a 40-pin 400mil SOJ and 400mil TSOP-2.




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