HYE18P32161AC-L70

The 32M Asynchronous/Page CellularRAM (CellularRAM) of the HYE18P32161AC-L70 is is the competitive alternative to today's SRAM based solutions in wireless applications, such as cellular phones. With its high density 1T1C-cell concept and highly optimized low power design, the CellularRAM is the advanced economic solution for the growing memory demand in baseband IC designs. SRAM-pin compatibility, refresh-free operation and extreme low power design makes a drop-in replacement in legacy systems an easy procedure.

Low power feature of Partial Array Self Refresh (PASR) of the HYE18P32161AC-L70 allows the user to dynamically scale the active (=refreshed) memory to his needs and to adapt the refresh rate to the actual system environment. That is no power penalty is paid in case only portions of the total available memory capacity is used (e.g. 8Mb out of 32Mb).

The CellularRAM of the HYE18P32161AC-L70 is available in two package options, in the SRAM compatible FBGA 48-ball package and with an enhanced feature set in a FBGA 54-ball package. For the advanced 54-ball device please refer to the corresponding data sheet (HYE18P32160AC).

The CelllularRAM of the HYE18P32161AC-L70 can be powered from a single 1.8V power supply feeding the core and the output drivers. Feeding the I/Os with a separate voltage supply the CelllularRAM can be easily adapted to systems operating in an I/O voltage range from 1.8V to 3.0V. The chip is fabricated in Infineon Technologies advanced 0.14m low power process technology.

The configuration of interfacing CellularRAM of the HYE18P32161AC-L70  is illustrated in Figure 1. Data byte control (UB, LB) is featured in all modes and provides dedicated lower and upper byte access.