HYE18P16161AC-L70

Features: • High density (1T1C-cell) Synchronous 16-Mbit Pseudo-Static RAM• Designed for cell phone applications (CellularRAM)• Functional-compatible to conventional low power asynchronous SRAM devices• Organization 1M * 16• Refresh-free operation• 1.8 V single ...

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SeekIC No. : 004369070 Detail

HYE18P16161AC-L70: Features: • High density (1T1C-cell) Synchronous 16-Mbit Pseudo-Static RAM• Designed for cell phone applications (CellularRAM)• Functional-compatible to conventional low power asyn...

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Part Number:
HYE18P16161AC-L70
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• High density (1T1C-cell) Synchronous 16-Mbit Pseudo-Static RAM
• Designed for cell phone applications (CellularRAM)
• Functional-compatible to conventional low power asynchronous SRAM devices
• Organization 1M * 16
• Refresh-free operation
• 1.8 V single power supply (VDD and VDDQ)
• Support of 2.5V and 3.0V I/O voltage options (VDDQ)
• Low power optimized design
ISTANDBY = 70 A for L-part and 100 A for standard part (16M), data retention mode
IDPD = < 25 A (16M), non-data retention mode
• Low power features (partly adopted from the JEDEC standardized low power SDRAM specifications)
Temperature Compensated Self-Refresh (TCSR)
Partial Array Self-Refresh (PASR)
Deep Power Down Mode (DPD)
• 70 ns random access cycle time, 20 ns page mode (read only) cycle time
• Byte read/write control by UB/LB
• Wireless operating temperature range from -25 °C to +85 °C
• P-VFBGA-48 chip-scale package (8 * 6 ball grid)



Specifications

Parameter
Symbol
Limit Values
Unit
Notes
Min.
Max.
Operating temperature range
TC
-25
+85
-
Storage temperature range
TSTG
-55
+150
-
Soldering peak temperature (10 s)
TSold
-
260
-
Voltage of VDD supply relative to VSS
VDD
-0.3
+2.45
V
-
Voltage of VDDQ supply relative to VSS
VDDQ
-0.3
+3.6
V
-
Voltage of any input relative to VSS
VIN
-0.3
+3.6
V
-
Power dissipation
PD
-
180
mW
-
Short circuit output current
IOUT
-50
+50
mA
-
Attention: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit.


Description

The 16M Asynchronous/Page CellularRAM (CellularRAM) of the HYE18P16161AC-L70 is is the competitive alternative to today's SRAM based solutions in wireless applications, such as cellular phones. With its high density 1T1C-cell concept and highly optimized low power design, the CellularRAM is the advanced economic solution for the growing memory demand in baseband IC designs. SRAM-pin compatibility, refresh-free operation and extreme low power design makes a drop-in replacement in legacy systems an easy procedure.

Low power feature of Partial Array Self Refresh (PASR) of the HYE18P16161AC-L70 allows the user to dynamically scale the active (=refreshed) memory to his needs and to adapt the refresh rate to the actual system environment. That is no power penalty is paid in case only portions of the total available memory capacity is used (e.g. 8Mb out of 16Mb).

The CellularRAM of the HYE18P16161AC-L70 is available in two package options, in the SRAM compatible FBGA 48-ball package and with an enhanced feature set in a FBGA 54-ball package. For the advanced 54-ball device please refer to the corresponding data sheet (HYE18P16160AC).

The CelllularRAM of the HYE18P16161AC-L70 can be powered from a single 1.8V power supply feeding the core and the output drivers. Feeding the I/Os with a separate voltage supply the CelllularRAM can be easily adapted to systems operating in an I/O voltage range from 1.8V to 3.0V. The chip is fabricated in Infineon Technologies advanced 0.14m low power process technology.

The configuration of interfacing CellularRAM of the HYE18P16161AC-L70 is illustrated in Figure 1. Data byte control (UB, LB) is featured in all modes and provides dedicated lower and upper byte access.




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