Features: • 16Mbit x16 organisation• VDD = VDDQ = 3.3 V• Fully Synchronous to Positive Clock Edge• Four Banks controlled by BA0 & BA1• ProgrammableCAS Latency: 2, 3• Programmable Wrap Sequence: Sequential or Interleave• Automatic and Controlled Prechar...
HYB39L256160AC: Features: • 16Mbit x16 organisation• VDD = VDDQ = 3.3 V• Fully Synchronous to Positive Clock Edge• Four Banks controlled by BA0 & BA1• ProgrammableCAS Latency: 2, 3...
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Features: • 1 048 576 words by 16-bit organization• 0 to 70 °C operating temperature...
Features: • 1 048 576 words by 16-bit organization• 0 to 70 °C operating temperature...
Features: • 1 048 576 words by 16-bit organization• 0 to 70 °C operating temperature...
The HYB39L256160AC Mobile-RAM is a new generation of low power, four bank Synchronous DRAM's organized as 4 banks x 4Mbit x 16. These synchronous Mobile-RAMs achieve high speed data transfer rates by employing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock.
All of the HYB39L256160AC control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock.
Operating the four memory banks in an interleave fashion allows random access operation to occur at higher rate. A sequential and gapless data rate is possible depending on burst length,CAS latency and speed grade of the device HYB39L256160AC.
Auto Refresh (CBR) and Self Refresh operation are supported. The device HYB39L256160AC operates with a single 3.3V ±0.3V power supply.
Compared to conventional SDRAM HYB39L256160AC the self-refresh current is further reduced. The Mobile-RAM devices are available in FBGA "chip-size" or TSOPII packages.