HV61

The HV61 is a 64-channel latched serial-to-parallel converter with bidirectional shifting capability and high-voltage outputs that can be switched in polarity from VPP to VNN. It is intended mainly as a driver for active-matrix liquid crystal displays in military systems. The shift direction is controlled by pins SHFL and CSBt A low at CSB enables the shift function, which occurs at the low-to-high transition of the clock. A high at SHFL causes data to be shifted "right-to left" (from Lm ROUT toward Lom- Rip), and vice versa. The 64 latches are transparent when LOAD is high, and the data is latched when load is low. The FRAME control reverses the voltage polarity of outputs that are in the logical high state. For FRAME = highthigh-level outputs will be at VDD level: for FRAME = low, high-level outputs will be at VSS level. Outputs at logic low will be low regardless of FRAME.

The features of HV61 can be summarized as (1)symmetrical + 10V output swing; (2)active return to ground; (3)+12V control logic; (4)bidirectional shift control pin; (5)data out for cascading; (6)8MHz clock.

The absolute maximum ratings of HV61 are (1)supply voltage, VDD: -0.5V to +15V; (2)supply voltage, VSS: -0.5V to +15.0VDC; (3)logic input levels: -0.5V to VDD +0.5V; (4)die storage temperature range: -65°C to 150°C; (5)continuous total power dissipationt ceramic: 1500mW; (7)storage temperature range: -65°C to 150°C; (8) operating temperature range :-55°C to +125°C.