Features: • Single HSP50016-EV May be Used to Evaluate the HSP50016• May be Daisy Chained to Support Evaluation of Multi-Chip Solutions• Parallel Port Interface to Support IBM PC™ Based Evaluation and Control• Three Clocking Modes for Flexibility in Performance Analys...
HSP50016-EV: Features: • Single HSP50016-EV May be Used to Evaluate the HSP50016• May be Daisy Chained to Support Evaluation of Multi-Chip Solutions• Parallel Port Interface to Support IBM PC...
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The HSP50016-EV is the evaluation board for the HSP50016 Digital Down Converter (DDC). It provides a mechanism for rapid evaluation and prototyping. The HSP50016-EV consists of a series of busses which provide input, output, and control to the DDC. These busses are brought out through dual 96 Pin connectors to support daisy chaining HSP50016-EVs with other Intersil evaluation boards for multichip prototyping and evaluation.
For added flexibility, the input and control busses can be driven by registers on-board the HSP50016-EV which have been down loaded with data via the parallel printer port of an IBM PC™ or compatible. In addition, the DDC output can be read into the PC via the status lines of the parallel port. Together, the I/O and Control Registers can be used to drive the target DDC with a PC based vector set while collecting output data on the PC's disk.
Jumper selectable clock sources provide three different methods of clocking the part under evaluation. In mode one, the clock signal is generated under PC based software control. In mode two, the HSP50016-EV's on-board oscillator may be selected as the clock source. In mode three, the user may provide an external clock through the 96 pin input connector.
The HSP50016-EV was built into a 3U Euro-Card form factor with dual 96 Pin Input/Output connectors. The I/O connectors conform to the VME J2/P2 Connector Standard.