Features: · Part Identification HSD16M72D18A-F/10L : 100MHz (CL=3) HSD16M72D18A-F/10 : 100MHz (CL=2) HSD16M72D18A-F/12 : 125MHz (CL=3) HSD16M72D18A-F/13 : 133MHz (CL=3) HSD16M72D18A-F/13H : 133MHz (CL=2) F means Auto & Self refresh with Low-Power (3.3V) · Burst mode operation · Auto & self...
HSD16M72D18A: Features: · Part Identification HSD16M72D18A-F/10L : 100MHz (CL=3) HSD16M72D18A-F/10 : 100MHz (CL=2) HSD16M72D18A-F/12 : 125MHz (CL=3) HSD16M72D18A-F/13 : 133MHz (CL=3) HSD16M72D18A-F/13H : 133MHz (...
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DescriptionThe HSD128M72B9K is a 128M x 72 bit Synchronous Dynamic RAM high density memory module....
PARAMETER |
SYMBOL |
RATING |
Voltage on Any Pin Relative to Vss |
VIN ,OUT |
-1V to 4.6V |
Voltage on Vcc Supply Relative to Vss |
Vcc |
-1V to 4.6V |
Power Dissipation |
PD |
18W |
Storage Temperature |
TSTG |
-55 to 150 |
Short Circuit Output Current |
IOS |
50mA |
Notes:
Permanent device damage may occur if " Absolute Maximum Ratings" are exceeded. Functional operation should be
restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
The HSD16M72D18A is a 16M x 72 bit Synchronous Dynamic RAM high-density memory module. The module consists of eighteen CMOS 8M x 8 bit with 4banks Synchronous DRAMs in TSOP-II 400mil packages and 2K EEPROM in 8-pinTSSOP package on a 168-pin glass-epoxy. Two 0.33uF-decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The HSD16M72D18A is a DIMM (Dual in line Memory Module) and is intended for mounting into 168-pin edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable latencies allows the same device to be useful for a variety of high bandwidth, high performance memory system applications All module components may be powered from a single 3.3V DC power supply and all inputs and outputs are LVTTL-compatible.