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HS-83C55RH

Features: • Radiation Hardened EPI-CMOS -Total Dose 1 x 105 RAD(Si) - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s• 2048 Words x 8 Bits ROM• Electrically Equivalent to Sandia SA3002• Pin Compatible with Intel 8355• Bus...

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SeekIC No. : 004365874 Detail

HS-83C55RH: Features: • Radiation Hardened EPI-CMOS -Total Dose 1 x 105 RAD(Si) - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR) - Latch-Up Free > 1 x 1012 RAD(Si)/s• 2048 Words x 8 Bits ...

HS-83C55RH Data Sheet

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Part Number:
HS-83C55RH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Radiation Hardened EPI-CMOS
    - Total Dose 1 x 105 RAD(Si)
    - Transient Upset > 1 x 108 RAD(Si)/s (Ports and DDR)
    - Latch-Up Free > 1 x 1012 RAD(Si)/s
• 2048 Words x 8 Bits ROM
• Electrically Equivalent to Sandia SA3002
• Pin Compatible with Intel 8355
• Bus Compatible with HS-80C85RH
• Single 5 Volt Power Supply
• Low Standby Current 100A Max
• Low Operating Current 2mA/MHz
• Completely Static Design
• Internal Address Latches
• Two General Purpose 8-Bit I/O Ports
• Multiplexed Address and Data Bus
• Self Aligned Junction Isolated (SAJI) Process
• Military Temperature Range -55 to +125


Pinout

Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . .-65 to +150
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . .+300
Typical Derating Factor . . . . . . . . . .  1.5mA/MHz Increase in IDDOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1


Description

The HS-83C55RH is a radiation hardened ROM and I/O chip fabricated using the Intersil radiation hardened Self-Aligned Junction Isolated (SAJI) silicon gate technology. Latch-up free operation is achieved by the use of epitaxial starting material to eliminate the parasitic SCR effect seen in conventional bulk CMOS devices.

The HS-83C55RH is intended for use with the HS-80C85RH radiation hardened microprocessor system.

The ROM portion HS-83C55RH is designed as 16,384 mask programmable cells organized in a 2048 word x 8-bit format. A maximum post irradiation access time of 340ns allows the HS-83C55RH to be used with the HS-80C85RH CPU without any wait states. This ROM is designed for operation utilizing a single 5 volt power supply.




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