HS-82C55ARH

Features:

* Radiation Hardened
- Total Dose >10⁵ RAD (Si)
- Transient Upset <10⁸ RAD (Si)/s
- Latch Up Free EPI-CMOS
* Low Power Consumption
- IDDSB = 20A
* Pin Compatible with NMOS 8255A and the Intersil 82C55A
* High Speed, No "Wait State" Operation with 5MHz HS-80C86RH
* 24 Programmable I/O Pins
* Bus-Hold Circuitry on All I/O Ports Eliminates Pull-Up Resistors
* Direct Bit Set/Reset Capability
* Enhanced Control Word Read Capability
* Hardened Field, Self-Aligned, Junction Isolated CMOS Process
* Single 5V Supply
* 2.0mA Drive Capability on All I/O Port Outputs
* Military Temperature Range: -55 to +125




Pinout






Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7.0V
Input, Output or I/O Voltage . . . . . . . . . . . . .V_SS-0.3V to V_DD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65to +150
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1




Description

The Intersil HS-82C55ARH is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The high performance and industry standard configuration of the HS-82C55ARH make it compatible with the 80C86, 80C88 and other microprocessors. Static CMOS circuit design insures low operating power. TTL compatibility over the full military temperature range and bus hold circuitry eliminate the need for pull-up resistors. The Intersil advanced SAJI process results in performance equal to or greater than existing functionally equivalent products at a fraction of the power.