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HS-82C08RH

Features: • Devices QML Qualified in Accordance With MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95714 and Intersil' QM Plan• Radiation Hardened- Total Dose 1 x 105 RAD (Si)- Latch-Up Immune EPI-CMOS > 1 x 1012 RAD (Si)/s• Bid...

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SeekIC No. : 004365866 Detail

HS-82C08RH: Features: • Devices QML Qualified in Accordance With MIL-PRF-38535• Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95714 and Intersil' QM Plan• Radiation...

HS-82C08RH Data Sheet

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Part Number:
HS-82C08RH
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Devices QML Qualified in Accordance With MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95714 and Intersil' QM Plan
• Radiation Hardened
- Total Dose 1 x 105 RAD (Si)
- Latch-Up Immune EPI-CMOS > 1 x 1012 RAD (Si)/s
• Bidirectional Three-State Input/Outputs
• Low Propagation Delay Time
• Low Power Consumption
• Single Power Supply +5V
• Electrically Equivalent to Sandia SA2997
• Military Temperature Range -55 to +125


Pinout

Connection Diagram


Specifications

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..+7.0V
Input, Output or I/O Voltage . . . . . . . . . . . .GND-0.3V to VDD+0.3V
Storage Temperature Range . . . . . . . . . . . . . . . . . -65 to +150
Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . .  . . . +175
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . .+300
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1


Description

The Intersil HS-82C08RH is a radiation-hardened octal bus transceiver with three-state outputs. It is manufactured using a self-aligned, junction isolated CMOS process and is designed for use with the HS-80C08RH radiation-hardened microprocessor. The HS-82C08RH allows asynchronous two-way communication between data buses. The direction of data flow is determined by the logic level on the transmit/ receive (T/R) input. A logic high on the T/R input specifies data flow from Port A to Port B of the device. Conversely, a logic low on the T/R input specifies data flow from Port B to Port A.

The Output Enable input disables both ports by placing them in the high impedance state. The HS-82C08RH is ideally suited for a wide variety of buffering applications in radiation-hardened microcomputer systems.




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