HPC3130

` Compliant with PCI Hot-Plug Specification, Revision 1.0
` Supports up to Four Independently Controlled Hot-Plug Slots
` Provides Register Accessing Through Both Generic Parallel Bus and Two-Wire Serial Interface
` Provides Interrupt and Event Status/Enable State Compliant with ACPI Specification 1.0
` Provides an Automatic Bus Connection Sequencing Feature
` Supports 66-MHz PCI Clock Frequency
` Features Two Attention Indicators with Variable LED Blinking Rates per Slot
` Provides an Easy Scheme to Cascade the HPC3130 for Compact PCI Applications
` Provides Card Detection Mechanism Independent of PCI Present Signals for Advanced Card Protection
` Provides Path to Guarantee Idle State During PCI Bus Connections
` Fabricated in Advanced Low-Power CMOS Process
` Features a CBT Switch† Control Feature for REQ64 Implementation
` Package Options:
120-pin QFP Package
128-pin LQFP Package
144-pin LQFP Package

The Texas Instruments HPC3130 is a peripheral component interconnect (PCI) hot-plug controller, compliant with PCI Hot-Plug Specification, Revision 1.0. This device supports hot insertion/removal of up to four hot-plug slots on a PCI bus, provides a 64-bit data path in any of the four hot-plug slots, and supports 66-MHz systems for two slots.

The primary function of the HPC3130 is to allow noninterfering hot-plug slot connection/disconnection with the other PCI devices on the bus. It provides automatic bus connection sequencing and supports a protocol for connection during bus idle conditions. It also supports an interrupt pin to report hot-plug slot events. The interrupt event status and enable state are compliant with the Advanced Configuration and Power Interface (ACPI) Specification.

Internal registers may be accessed through either a two-signal serial interface or a generic parallel bus. The serial interface slave decoding circuit supports up to eight different controllers or other serial bus devices with the same system base. Decoding through the parallel interface supports multiple controllers with external chip-select logic. Two double-words of configuration and control registers are provided per slot. As a result, the HPC3130 decodes an address range of 32 bytes.

An advanced complementary metal-oxide semiconductor (CMOS) process of HPC0201A  provides low system power consumption while operating at PCI clock rates up to 66 MHz.