Features: Access time : 55, 70ns High-density design : 32Mbit Design Battery internally isolated until power is applied Industry-standard 40-pin 4,096K x 8 pinout Unlimited write cycles Data retention in the absence of VCC 5-years minimum data retention in absence of power Automatic write-protecti...
HMN4M8DV(N): Features: Access time : 55, 70ns High-density design : 32Mbit Design Battery internally isolated until power is applied Industry-standard 40-pin 4,096K x 8 pinout Unlimited write cycles Data retenti...
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PARAMETER |
SYMBOL |
RATING |
CONDITIONS |
DC voltage applied on VCC relative to VSS |
VCC |
-0.5V to VCC +0.2V |
|
DC Voltage applied on any pin excluding VCC relative to VSS |
VT |
-0.2V to 4.6V |
|
Operating temperature |
TOPR |
0 to 70°C |
Commercial |
-40 to 85°C |
Industrial | ||
Storage temperature |
TSTG |
-65°C to 150°C |
|
Temperature under bias |
TBIAS |
-40°C to 85°C |
|
Soldering temperature |
TSOLDER |
260°C |
For 10 second |
The HMN4M8DV(N) Nonvolatile SRAM is a 33,554,432-bit static RAM organized as 4,194,304 bytes by 8 bits. The HMN4M8DV has a self-contained lithium energy source provide reliable non -volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 3.3V supply for an out-oftolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid.
The HMN4M8DV(N) uses extremely low standby current CMOS SRAM's, coupled with small lithium coin cells to provide non - volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.