Features: · High-density 32MByte design· Single + 5V ± 0.5V power supply· Command/Address/Data Multiplexed I/O port· Organization- Memory Cell Array: (4M+128K)bit x 8bit- Data Register : (512+16)bit x 8bit· Automatic Program and Erase- Page Program: (512+16)Byte- Block Erase: (8K+256)Byte- Status ...
HMFN16M16M8G: Features: · High-density 32MByte design· Single + 5V ± 0.5V power supply· Command/Address/Data Multiplexed I/O port· Organization- Memory Cell Array: (4M+128K)bit x 8bit- Data Register : (512+16)bit...
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PARAMETER | SYMBOL | RATING | UNIT |
Voltage on any pin relative to Vss | VIN | -0.6 to +7.0 | V |
Temperature Under Bias | TBIAS | -10 to +125 | |
Storage Temperature | TSTG | -65 to +150 | |
Short Circuit Output Current | IOS | 5 | mA |
` Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
The HMFN16M16M8G is a high-speed NAND flash read only memory (FROM) module containing 16,777,216 words organized in a x16bit configuration. The module consists of eight 4M x 8 FROM mounted on a 72 -pin, double-sided, R4- printed circuit board.
About HMFN16M16M8G,Data in the page can be read out at 50ns-cycle time per byte.
HMFN16M16M8G extended reliability of 1,000,000 program/erase cycles by providing either ECC (Error Correction Code) or real time mapping out algorithm.
HMF16M16M8G is has address multiplexed into 16 I/O's . Command, address and data are all written through I/O's by
bringing /WE to low while /CE is low. Data is latched on th e rising edge of /WE. Command Latch Enable (CLE) and ddress Latch Enable (ALE) are used to multiplex command and address respectively, via the I/O pins.