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HM5264405F-75

Features: ` 3.3 V power supply` Clock frequency: 133 MHz/100 MHz (max)` LVTTL interface` Single pulsed RAS` 4 banks can operate simultaneously and independently` Burst read/write operation and burst read/single write operation capability` Programmable burst length: 1/2/4/8/full page` 2 var...

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SeekIC No. : 004363454 Detail

HM5264405F-75: Features: ` 3.3 V power supply` Clock frequency: 133 MHz/100 MHz (max)` LVTTL interface` Single pulsed RAS` 4 banks can operate simultaneously and independently` Burst read/write operation and...

HM5264405F-75 Data Sheet

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Part Number:
HM5264405F-75
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Features:

`   3.3 V power supply
`   Clock frequency: 133 MHz/100 MHz (max)
`   LVTTL interface
`   Single pulsed RAS
`   4 banks can operate simultaneously and independently
`   Burst read/write operation and burst read/single write operation capability
`   Programmable burst length: 1/2/4/8/full page
`   2 variations of burst sequence
    - Sequential (BL = 1/2/4/8/full page)
    - Interleave (BL = 1/2/4/8)
` Programmable CAS latency: 2/3
` Byte control by DQM:DQM (HM5264805F/HM5264405F) DQMU/DQML (HM5264165F)
` Refresh cycles: 4096 refresh cycles/64 ms
` 2 variations of refresh
- Auto refresh
- Self refresh
` Full page burst length capability
- Sequential burst
- Burst stop capability


Pinout

Connection Diagram


Specifications

Parameter
Symbol
Value
Unit
Note
Voltage on any pin relative to VSS
VT
0.5 to VCC + 0.5
( 4.6 (max))
V
1
Supply voltage relative to VSS
VCC
0.5 to +4.6
V
1
Short circuit output current
Iout
50
mA
Power dissipation
PT
1.0
W
Operating temperature
Topr
0 to +70
C
Storage temperature
Tstg
55 to +125
C


Note: 1. Respect to VSS .




Description

The Hitachi HM5264165F is a 64-Mbit SDRAM organized as 1048576-word ´ 16-bit ´ 4 bank. The product is a 64-Mbit SDRAM organized as 2097152-word ´ 8-bit ´ 4 bank. It is a 64-Mbit SDRAM organized as 4194304-word ´ 4-bit ´ 4 bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.




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