HM5257805B-75/A6

      In the HM5257165B-75/A6,HM5257805B-75/A6 and HM5257405B-75/A6  series, the HM5257165B is a 512-Mbit SDRAM organized as 8388608-word * 16-bit * 4 bank. The HM5257805B is a 512-Mbit SDRAM organized as 16777216-word * 8-bit * 4 bank. The HM5257405B is a 512-Mbit SDRAM organized as 33554432-word * 4-bit * 4 bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 54-pin plastic TSOP II.
      The HM5257165B-75/A6,HM5257805B-75/A6 and HM5257405B-75/A6 has 13 features.The first one is 3.3 V power supply.The second one is Clock frequency: 133 MHz/100 MHz (max).The third one is LVTTL interface.The fourth one is Single pulsed RAS.The fifth one is 4 banks can operate simultaneously and independently.The sixth one is Burst read/write operation and burst read/single write operation capability.The seventh one is Programmable burst length: 1/2/4/8.The eighth one is 2 variations of burst sequence,Sequential (BL = 1/2/4/8),Interleave (BL = 1/2/4/8).The ninth one is Programmable CAS latency: 2/3.The tenth one is Byte control by DQM is DQM (HM5257805B/HM5257405B),DQMU/DQML (HM5257165B).The eleventh one is Refresh cycles: 8192 refresh cycles/64 ms.The twelfth one is 2 variations of refresh,Auto refresh,Self refresh.The thirteenth one is Temperature range: 0 to 60°C.
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