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HM5225325F

Features: ` Single chip wide bit solution (* 64/* 32)` 3.3 V power supply` Clock frequency: 100 MHz (max)` LVTTL interface` Extremely small foot print: 1.27 mm pitch-Package: BGA (BP-108)` 4 banks can operate simultaneously and independently` Burst read/write operation and burst read/single write ...

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SeekIC No. : 004363429 Detail

HM5225325F: Features: ` Single chip wide bit solution (* 64/* 32)` 3.3 V power supply` Clock frequency: 100 MHz (max)` LVTTL interface` Extremely small foot print: 1.27 mm pitch-Package: BGA (BP-108)` 4 banks c...

HM5225325F Data Sheet

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Part Number:
HM5225325F
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

`  Single chip wide bit solution (* 64/* 32)
`  3.3 V power supply
`  Clock frequency: 100 MHz (max)
`  LVTTL interface
`  Extremely small foot print: 1.27 mm pitch
     - Package: BGA (BP-108)
`  4 banks can operate simultaneously and independently
`  Burst read/write operation and burst read/single write operation capability
`  Programmable burst length: 4/8/full page
`  2 variations of burst sequence
     - Sequential (BL = 4/8/full page)
     - Interleave (BL = 4/8)
`  Programmable CAS latency: 2/3
`  Byte control by DQMB
`  Refresh cycles: 4096 refresh cycles/64 ms
`  2 variations of refresh
     - Auto refresh
     - Self refresh
`  Full page burst length capability
     - Sequential burst
     - Burst stop capability


Pinout

Connection Diagram


Specifications

Parameter Symbol Value Unit Note
Voltage on any pin relative to VSS VT 0.5 to VCC + 0.5
( 4.6 (max))		 V 1
Supply voltage relative to VSS VCC 0.5 to +4.6 V 1
Short circuit output current Iout 50 mA  
Operating temperature Topr 0 to +70 (Tj max = 110) °C  
Operating temperature Tstg 55 to +125 °C  



Description

The Hitachi HM5225645F is a 256-Mbit SDRAM organized as 1048576-word × 64-bit × 4-bank. The Hitachi HM5225325F is a 256-Mbit SDRAM organized as 2097152-word × 32-bit × 4-bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 108 bump BGA.


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