HIP6602

Features:

• Drives Four N-channel MOSFETs
• Adaptive Shoot-Through Protection
• Internal Bootstrap Devices
• Supports High Switching Frequency
         - Fast Output Rise Time
         - Propagation Delay 30ns
• Small 14-Lead SOIC Package
• 5V to 12V Gate-Drive Voltages for Optimal Efficiency
• Three-State Input for Bridge Shutdown
• Supply Under-Voltage Protection


Application

• Core Voltage Supplies for Intel Pentium® III and AMD® AthlonTM Microprocessors.
• High Frequency Low Profile DC/DC Converters
• High Current Low Voltage DC/DC Converters


Pinout




Specifications

Supply Voltage (V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . .15V
Supply Voltage (P_VCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V
BOOT Voltage (V_BOOT - V_PHASE) . . . . . . . . . . . . . .  . . . . . . . . .15V
Input Voltage (V_PWM) . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to 7V
UGATE. . . . . . . . . . . . . . . . . . . .  . . . V_PHASE - 0.3V to V_BOOT + 0.3V
LGATE . . . . . . . . . . . . . . . . . . . . .  . . . . GND - 0.3V to V_PVCC + 0.3V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . .  . .3kV
Machine Model (Per EIAJ ED-4701 Method C-111) . . . .  .  . . . .200V


Description

The HIP6602 is a high frequency, two power channel MOSFET driver specifically designed to drive four power N-Channel MOSFETs in a synchronous-rectified buck converter topology. These drivers combined with a HIP63xx series of Multi-Phase Buck PWM controller and Intersil's UltraFETs® form a complete core voltage regulator solution for advanced microprocessors.

The HIP6602 drives both upper and lower gates over a range of 5V to 12V. This drive-voltage flexibility provides the advantage of optimizing applications involving trade-offs between switching losses and conduction losses.

The output drivers in the HIP6602 have the capacity to efficiently switch power MOSFETs at high frequencies. Each driver is capable of driving a 3000pF load with a 30ns propagation delay and 50ns transition time. This device implements bootstrapping on the upper gates with only a single external capacitor required for each power channel. This reduces implementation complexity and allows the use of higher performance, cost effective, N-Channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously.