HIP6601A

Features: • Drives Two N-Channel MOSFETs• Adaptive Shoot-Through Protection• Internal Bootstrap Device• Supports High Switching Frequency- Fast Output Rise Time- Propagation Delay 30ns• Small 8 Lead SOIC and EPSOIC and 16 Lead QFN Packages• Dual Gate-Drive Volta...

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SeekIC No. : 004362762 Detail

HIP6601A: Features: • Drives Two N-Channel MOSFETs• Adaptive Shoot-Through Protection• Internal Bootstrap Device• Supports High Switching Frequency- Fast Output Rise Time- Propagation ...

floor Price/Ceiling Price

Part Number:
HIP6601A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/10/30

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Product Details

Description



Features:

• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
• Internal Bootstrap Device
• Supports High Switching Frequency
- Fast Output Rise Time
- Propagation Delay 30ns
• Small 8 Lead SOIC and EPSOIC and 16 Lead QFN
Packages
• Dual Gate-Drive Voltages for Optimal Efficiency
• Three-State Input for Output Stage Shutdown
• Supply Under Voltage Protection



Application

• Core Voltage Supplies for Intel Pentium® III, AMD®
Athlon™ Microprocessors
• High Frequency Low Profile DC-DC Converters
• High Current Low Voltage DC-DC Converters



Description

Designed for versatility and speed, the HIP6601A, HIP6603A and HIP6604 dual MOSFET drivers control both high-side and low-side N-Channel FETs from one externally provided PWM signal.
The upper and lower gates of HIP6601A, HIP6603A and HIP6604 are held low until the driver is initialized. Once the VCC voltage surpasses the VCC Rising Threshold (See Electrical Specifications), the PWM signal takes control of gate transitions. A rising edge on PWM initiates the turn-off of the lower MOSFET (see Timing Diagram). After a short propagation delay [tPDLLGATE], the  lower gate begins to fall. Typical fall times [tFLGATE] are  provided in the Electrical Specifications section. Adaptive  shoot-through circuitry monitors the LGATE voltage and determines the upper gate delay time [tPDHUGATE] based on how quickly the LGATE voltage drops below 2.2V. This  prevents both the lower and upper MOSFETs from conducting simultaneously or shoot-through. Once this delay period is complete the upper gate drive begins to rise [tRUGATE] and the upper MOSFET turns on.


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