HI5905

Features:

• Sampling Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 MSPS
• Low Power at 5 MSPS . . . . . . . . . . . . . . . . . . . . . .350mW
• Internal Sample and Hold
• Fully Differential Architecture
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . 100MHz
• SINAD at 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . >70dB
• Low Data Latency
• Internal Voltage Reference
• TTL Compatible Clock Input
• CMOS Compatible Digital Data Outputs


Application

• Digital Communication Systems
• Undersampling Digital IF
• Asymmetric Digital Subscriber Line (ADSL)
• Document Scanners
• Reference Literature
       - AN9214, Using Intersil High Speed A/D Converters
       - AN9785, Using the Intersil HI5905 EVAL2 Evaluation Board


Pinout




Specifications

Supply Voltage, AV_CC or DV_CC to AGND or DGND . . . . . . . . . ..+6.0V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3V
Digital I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DGND to DV_CC
Analog I/O Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .AGND to AV_CC


Description

The HI5905 is a monolithic, 14-bit, 5 MSPS Analog-to- Digital Converter fabricated in an advanced BiCMOS process. It is designed for high speed, high resolution applications where wide bandwidth, low power consumption and excellent SINAD performance are essential. With a 100MHz full power input bandwidth and high frequency accuracy, the converter is ideal for many types of communication systems employing digital IF architectures.

The HI5905 is designed in a fully differential pipelined architecture with a front end differential-in-differential-out sample-and-hold amplifier (S/H). The HI5905 has excellent dynamic performance while consuming 350mW power at 5 MSPS.Data output latches are provided which present valid data to the output bus with a low data latency of 4 clock cycles.