HI3256

Features:

• Differential Linearity Error. . . . . . . . . . . . . . . . . . ±0.5 LSB
• Integral Linearity Error . . . . . . . . . . . . . . . . . . . . ±0.5 LSB
• Low Input Capacitance. . . . . . . . . . . . . . . . . . . . . . . 10pF
• Wide Analog Input Bandwidth . . . . . . . . . . . . . . . 250MHz
• Low Power Consumption . . . . . . . . . . . . . . . . . . . 500mW
• Output Voltage Control Function (VOCLP pin)
• 1:2 Demultiplexed Output Pin
• Internal 1/2 Frequency Divider Circuit (w/Reset Function)
• CLK/2 Clock Output
• Compatible with PECL, ECL and TTL Digital Input Levels
• Direct Replacement for Sony CXA3256R


Application

• LCD/PDP Monitors and Projectors (RGB Video)
• Digital Oscilloscopes
• Digital Communications (QPSK, QAM)
• Magnetic Recording (PRML)


Pinout




Specifications

Supply Voltage (AVCC, DVCC1, DVCC2) . . . . . . . . . . -0.5V to +7.0V
(DGND3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
(DV_EE3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7.0V to +0.5V
(DGND3 - DV_EE3) . . . . . . . . . . . . . . . . . . . . . . . .  .. -0.5V to +7.0V
Analog Input Voltage (V_IN). . . . . . . . . . . . . .. . V_RT - 2.7V to AV_CC
Reference Input Voltage (V_RT). . . . . . . . . . . . . . .. . +2.7V to AV_CC
(VRB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V_IN - 2.7V to AV_CC
(|VRT - VRB|) . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . +2.5V
Digital Input Voltage
PECL/ECL . . . . . . . . . . . . . . . . . .  .  . . DV_EE3 - 0.5 to DGND3 + 0.5
TTL. . . . . . . . . . . . . . . . . . . . . . . .  . . . DGND3 - 0.5 to DV_CC1 + 0.5
VID (|***/E - ***N/E| (Note 2)) . . . . . . . . .. . . . . . . . . . . . . . . 2.7V


Description

The HI3256 is an 8-bit, high-speed, flash analog-to-digital converter optimized for high speed, low power, and ease of use. With a 120MSPS encode rate capability and full-power analog bandwidth of 250MHz, this component is ideal for applications requiring the highest possible dynamic performance.

To minimize system cost and power dissipation, only a +5V power supply is required. The HI3256 clock input interfaces directly to TTL, ECL or PECL logic and will operate with singleended inputs. The user may select 16-bit demultiplexed output or 8-bit single channel digital outputs. The demultiplexed mode interleaves the data through two 8-bit channels at 1/2 the clock rate. Operation in demultiplexed mode reduces the speed and cost of external digital interfaces, while allowing the A/D converter to be clocked to the full 120MSPS conversion rate.

Fabricated with an advanced Bipolar process, the HI3256 is provided in a space-saving 48-lead LQFP surface mount plastic package and is specified over the -20 to 75 temperature range.