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HI-5701

Features: • 30MSPS with No Missing Codes• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . . 20MHz• No Missing Codes Over Temperature• Sample and Hold Not Required• Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . .+5V• Power Dis...

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SeekIC No. : 004362431 Detail

HI-5701: Features: • 30MSPS with No Missing Codes• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . . 20MHz• No Missing Codes Over Temperature• Sample and Hold Not Require...

HI-5701 Data Sheet

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Part Number:
HI-5701
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Features:

• 30MSPS with No Missing Codes
• Full Power Input Bandwidth . . . . . . . . . . . . . . . . . . 20MHz
• No Missing Codes Over Temperature
• Sample and Hold Not Required
• Single Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . .+5V
• Power Dissipation (Max). . . . . . . . . . . . . . . . . . . . .300mW
• CMOS/TTL Compatible
• Overflow Bit
• /883 Version Available




Application

• Video Digitizing
• Radar Systems
• Communication Systems
• High Speed Data Acquisition Systems




Pinout

Connection Diagram




Specifications

Supply Voltage, VDD to VSS . . . . . . . . . . . (VSS - 0.5) < VDD < +7V
Analog and Reference Input Pins (VSS - 0.5) < VINA < (VDD +0.5V)
Digital I/O Pins . . . . . . . . . . . . . . .(VSS - 0.5) < VI/O < (VDD +0.5V)




Description

The HI-5701 is a monolithic, 6-bit, CMOS flash Analog-to-Digital Converter. It is designed for high speed applications where widebandwidth and low power consumption are essential. Its 30MSPS speed is made possible by a parallel architecture which also eliminates the need for an external sample and hold circuit. The HI-5701 delivers ±0.7 LSB differential nonlinearity while consuming only 250mW (Typ) at 30MSPS. Microprocessor compatible data output latchesare provided which present valid data to the output bus 1.5 clock cycles after the convert command is received. An overflow bit is provided to allow the series connection of two converters to achieve 7-bit resolution.






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