Features: ·Ideal for Use in PC100 Registered DIMM·0.5mm CMOS Technology·2.3 ~ 3.6 VCC Operation·Output Port Has 26-WSeries Damping Resistor, No External Resistors are Required·Package Options Include Plastic Thin Shrink Small-Outline Packages, Shrink Small-Outline Packages , Thin Very Small Outlin...
HG74ALVC162835C: Features: ·Ideal for Use in PC100 Registered DIMM·0.5mm CMOS Technology·2.3 ~ 3.6 VCC Operation·Output Port Has 26-WSeries Damping Resistor, No External Resistors are Required·Package Options Includ...
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Features: · Ideal for Use in PC100 Registered DIMM· 0.5mm CMOS Technology· 2.3 ~ 3.6 VCC Operation...
Symbols | Parameter | Value | Conditions |
VCC | Supply Voltage Range | -0.5 V to 4.6 V | |
VI | Input Voltage Range (see note 1) | -0.5 V to VCC + 0.5 V | |
VO | Output Voltage Range (see notes 1 and 2) | -0.5 V to VCC + 0.5 V | |
IIK | Input Clamp Current | -50 mA | VI < 0 |
IOK | Output Clamp Current | ±50 mA | VO <0 or VO >VCC |
IO | Continuous Output Current | ±50 mA | VO =0 to VCC |
ICC | Continuous Current through each VCC | +100 mA | |
IGND | Continuous Current through each GND | -100 mA | |
Tstg | Storage Temperature Range | - 65°C to 150°C |
The HG74ALVC162835C is an 18-bit universal bus driver designed for 2.3V to 3.6 V VCC Operation.
The Output Enable(OE) controls data flow from A to Y. The HG74ALVC162835C operates in transparent mode when the latch-enable(LE) input is high. When LE is low, the A data is latched if the clock input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the Outputs are in the high impedance state. OE should be tied to VCC through a pull up resistor to ensure the high impedance state during power up or power down.The equivalent 26-W series resistors are included in the output to reduce overshoot and undershoot.
The HG74ALVC162835C is characterized for operation from -40°C to 85°C.