HEF4505B

Pinout




Description

The HEF4505B is a 64-bit, 1-bit per word, fully decoded and completely static, random access memory. The memory is strobed for reading or writing only when the strobe input (ST), chip enable inputs (CE₁ and CE₂) are HIGH simultaneously. The output data of HEF4505B is available at the data output (D_OUT) only when the memory is strobed, the read/write input (R/W) is HIGH and after the read access time has passed. Note that the three-state output is initially disabled and always goes to the LOW state before data is valid. The output of HEF4505B is disabled in the high-impedance OFF-state, when the memory is not strobed or R/W is LOW. R/W may remain HIGH during a read cycle or LOW during a write cycle. The output data has the same polarity as the input data.