HEF40163B

ApplicationAn example of an application for the HEF40163B is:· Programmable binary counter.PinoutDescriptionThe HEF40163B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (para...

product image

HEF40163B Picture
SeekIC No. : 004361327 Detail

HEF40163B: ApplicationAn example of an application for the HEF40163B is:· Programmable binary counter.PinoutDescriptionThe HEF40163B is a fully synchronous edge-triggered 4-bit binary counter with a clock inpu...

floor Price/Ceiling Price

Part Number:
HEF40163B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/11/21

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Application

An example of an application for the HEF40163B is:
· Programmable binary counter.



Pinout

  Connection Diagram


Description

The HEF40163B is a fully synchronous edge-triggered 4-bit binary counter with a clock input (CP), four synchronous parallel data inputs (P0 to P3), four synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP), count enable trickle (CET) and synchronous reset (SR)), buffered outputs from all four bit positions (O0 to O3) and a terminal count output (TC).

Operation of HEF40163B  is fully synchronous and occurs on the LOW to HIGH transition of CP. When PE is LOW, the next LOW to HIGH transition of CP loads data into the counter from P0 to P3. When PE is HIGH, the next LOW to HIGH transition of CP advances the counter to its next state only if both CEP and CET are HIGH; otherwise no change occurs in the state of the counter. TC is HIGH when the state of the counter is 15 (O0 to O3 = HIGH) and when CET is HIGH.

A LOW on SR sets all outputs (O0 to O3 and TC) LOW on the next LOW to HIGH transition of CP, independent of the state of all other synchronous mode control inputs (CEP, CET and PE). Multistage synchronous counting is possible without additional components by using a carry look-ahead counting technique; in this case, TC is used to enable successive cascaded stages of HEF40163B. CEP, CET, PE and SR must be stable only during the set-up time before the LOW to HIGH transition of CP.


Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Programmers, Development Systems
Soldering, Desoldering, Rework Products
Isolators
Hardware, Fasteners, Accessories
Static Control, ESD, Clean Room Products
Power Supplies - External/Internal (Off-Board)
View more