HD74HCT574

`  LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
`  High Speed Operation: t_pd (D to Q, Q) = 15 ns typ (C_L = 50 pF)
`  High Output Current: Fanout of 15 LSTTL Loads
`  Wide Operating Voltage: V_CC = 4.5 to 5.5 V
`  Low Input Current: 1 A max
`  Low Quiescent Supply Current: I_CC (static) = 4 A max (Ta = 25°C)

These  HD74HCT564 and HD74HCT574  devices are positive edge triggered flip-flops. The difference between HD74HCT564 and HD74HCT574 is only that the former has inverting outputs and the latter has non-inverting outputs.Data at the D inputs, meeting the set-up and hold time requirements, are transferred to the Q or Q outputs on positive going transitions of the clock (CK) input. When a high logic level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.