HD74HC173

Features:

·  High Speed Operation: tpd (Clock to Q) = 14 ns typ (CL = 50 pF)
·  High Output Current: Fanout of 10 LSTTL Loads
·  Wide Operating Voltage: VCC = 2 to 6 V
·  Low Input Current: 1 µA max
·  Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)


Specifications

Item	Symbol	Rating	Unit
Supply voltage range	VCC	0.5 to +7.0	V
Input voltage	VIN	0.5 to VCC + 0.5	V
Output voltage	VOUT	0.5 to VCC + 0.5	V
DC current drain per pin	IOUT	±35	mA
DC current drain per VCC, GND	ICC, IGND	±75	mA
DC input diode current	IIK	±20	mA
DC output diode current	IOK	±20	mA
Power dissipation per package	PT	500	mW
Storage temperature	Tstg	65 to +150	°C

Description

   The HD74HC173 four D type Flip-Flops operate synchronously from a common clock. The 3-state outputs allow the device to be used in bus organized systems. The outputs are placed in the 3-stage mode when either of the output disable pins are in the logic high level.

   The input disable of HD74HC173 allows the flip-flops to remain in their present states without having to disrupt the clock.If either of the 2 input disables are taken to a logic high level, the Q outputs are fed back to the inputs,forcing the flip-flops to remain in the same state. Clearing is enabled by taking the clear input to a logic high level. The data outputs change state on the positive going edge of the clock.