Features: ` VCC = 2.3 V to 3.6 V` Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)` Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)` High output current ±12 mA (@VCC = 3.0 V)` Bus hold on data inputs eliminates the need for external pullup / pulldown resistors` All output...
HD74ALVCH162373: Features: ` VCC = 2.3 V to 3.6 V` Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)` Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)` High output current ±12 mA (@VCC = 3.0 ...
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Item |
Symbol |
Ratings |
Unit |
Conditions |
Supply voltage |
VCC |
0.5 to 4.6 |
V |
|
Input voltage *1 |
VI |
0.5 to 4.6 |
V |
|
Output voltage *1,2 |
VO |
0.5 to VCC +0.5 |
V |
|
Input clamp current |
IIK |
-50 |
mA |
|
Output clamp current |
IOK |
±50 |
mA |
VO<0 or VO>VCC |
Continuous output current |
IO |
±50 |
mA |
VO = 0 to VCC |
±100 | ||||
Maximum power dissipation at Ta = 55°C (in still air)*3 |
PT |
0.85 |
W |
TSSOP |
Storage temperature |
Tstg |
65 to 150 |
°C |
Notes: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
The HD74ALVCH162373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. HD74ALVCH162373 can be used as two 8-bit latches or one 16-bit latch. When the latch enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include 26 resistors to reduce overshoot and undershoot.