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HD64F2161BV

Features: • Upward-compatibility with H8/300 and H8/300H CPUsCan execute H8/300 CPU and H8/300H CPU object programs• General-register architectureSixteen 16-bit general registers also usable as sixteen 8-bit registers or eight 32-bit registers• Sixty-five basic instructions8/16/3...

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SeekIC No. : 004360281 Detail

HD64F2161BV: Features: • Upward-compatibility with H8/300 and H8/300H CPUsCan execute H8/300 CPU and H8/300H CPU object programs• General-register architectureSixteen 16-bit general registers also us...

HD64F2161BV Data Sheet

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Part Number:
HD64F2161BV
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

•  Upward-compatibility with H8/300 and H8/300H CPUs
Can execute H8/300 CPU and H8/300H CPU object programs
•  General-register architecture
Sixteen 16-bit general registers also usable as sixteen 8-bit registers or eight 32-bit registers
•  Sixty-five basic instructions
8/16/32-bit arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
•  Eight addressing modes
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
•  16-Mbyte address space
Program: 16 Mbytes
Data: 16 Mbytes
•  High-speed operation
All frequently-used instructions are executed in one or two states
8/16/32-bit register-register add/subtract: 1 state
8 * 8-bit register-register multiply: 12 states (MULXU.B), 13 states (MULXS.B)
16 ÷ 8-bit register-register divide: 12 states (DIVXU.B)
16 * 16-bit register-register multiply: 20 states (MULXU.W), 21 states (MULXS.W)
32 ÷ 16-bit register-register divide: 20 states (DIVXU.W)
•  Two CPU operating modes
Normal mode
Advanced mode
•  Power-down state
Transition to power-down state by SLEEP instruction
Selectable CPU clock speed




Specifications

Item Symbol Value Unit
Power supply voltage VCC, VCL 0.3 to +4.3 V
I/O buffer power supply voltage VCCB 0.3 to +7.0 V
Input voltage (except ports 6, 7, and A, P97,
P86, P52, and P42)
(Ports C to G are added in the H8S/2160B and
H8S/2161B.)		 Vin 0.3 to VCC + 0.3 V
Input voltage (CIN input not selected for port 6) Vin 0.3 to VCC + 0.3 V
Input voltage (CIN input not selected for port A) Vin 0.3 to VCCB + 0.3 V
Input voltage (CIN input selected for port 6) Vin 0.3 V to lower of voltages
VCC + 0.3 and AVCC + 0.3		 V
Input voltage (CIN input selected for port A) Vin 0.3 V to lower of voltages
VCCB + 0.3 and AVCC + 0.3		 V
Input voltage (P97, P86, P52, P42) Vin 0.3 to +7.0 V
Input voltage (port 7) Vin 0.3 to AVCC + 0.3 V
Reference supply voltage AVref 0.3 to AVCC + 0.3 V
Analog power supply voltage AVCC 0.3 to +4.3 V
Analog input voltage VAN 0.3 to AVCC + 0.3 V
Operating temperature Topr 20 to +75
Operating temperature (flash memory
programming/erasing)		 Topr 20 to +75
Storage temperature Tstg 55 to +125

Caution: Permanent damage to the chip may result if absolute maximum ratings are exceeded.
Ensure so that the impressed voltage does not exceed 4.3 V for pins for which the maximum rating is determined by the voltage on the VCC, AVCC, and VCL pins, or 7.0 V for pins for which the maximum rating is determined by VCCB.
The VCC and VCL pins must be connected to the Vcc power supply.






Description

The H8S/2000 CPU is a high-speed central processing unit with an internal 32-bit architecture that is upward-compatible with the H8/300 and H8/300H CPUs. The H8S/2000 CPU has sixteen 16-bit general registers, can address a 16-Mbyte linear address space, and is ideal for realtime control.

This section describes the H8S/2000 CPU. The usable modes and address spaces differ depending on the product. For details on each product, refer to section 3, MCU Operating Modes.






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