HD64570

Features:

·  Data transfer rate: 50 bits/s to 7.1 Mbits/s (f = 10 MHz),
             50 bits/s to 12 Mbits/s (f = 16.7 MHz)
             50 bits/s to 5.7 Mbits/s (f = 8 MHz)*
·  Protocol support
             _  Asynchronous (ASYNC): 5 to 8 bits + parity
             _  Byte synchronous (COP): bisync, X.21, DDCMP, etc.
             _  Bit synchronous (BOP): frame relay, HDLC, ÔSDLC, X.25 link level (LAPB), LAPD etc.
·  Highly efficient data transfer: two 32-byte FIFOs (transmit/receive) per channel
·  Error detection: parity (asynchronous) CRC-16, CRC-CCITT (byte- and bit-synchronous)


Specifications

Item	Symbol	Rating	Unit
Supply voltage	VCC	-0.3 to +7.0	V
Input voltage	Vin	-0.3 to VCC +0.3	V
Operating temperature	Topr	-20 to +75
Storage temperature	Tstg	-55 to +150

Description

The HD64570 serial communications adaptor (SCA) converts parallel data to serial data for communication with other devices. Its two independent, full-duplex transceivers support both synchronous (bit-synchronous or byte-synchronous) and asynchronous communication. Extensive protocol functions are provided.

The HD64570 SCA chip provides FIFO transmit and receive buffers with 32 stages each and a four-channel direct memory access controller (DMAC) with chained-block transfer facilities, enabling highspeed transfer of data between SCA and memory. A built-in bus arbiter and 16-bit bus interface support high-performance system designs.