HD6435368RCP_1174460

The H8/534 and H8/536 are CMOS microcomputer units (MCUs) comprising a CPU core plus a ull range of supporting functions-an entire system integrated onto a single chip.

The CPU features a highly orthogonal instruction set that permits addressing modes and data sizes o be specified independently in each instruction.  An internal 16-bit architecture and 16-bit access o on-chip memory enhance the CPU's data-processing capability and provide the speed needed or realtime control applications.

The on-chip supporting functions include RAM, ROM, timers, a serial communication interface SCI), A/D conversion, and I/O ports.  An on-chip data transfer controller (DTC) can transfer data n either direction between memory and I/O independently of the CPU.

For the on-chip ROM, a choice is offered between masked ROM and programmable ROM PROM).  The PROM version can be programmed by the user with a general-purpose PROM riter.

Note: Permanent LSI damage may occur if maximum ratings are exceeded.  Normal operation hould be under recommended operating conditions.

All eight of the HD6435368RCP_1174460 16-bit general registers are functionally alike; there is no distinction between data egisters and address registers.  When these registers are accessed as data registers, either byte or ord size can be selected.

R6 and R7, in addition to functioning as general registers, have special assignments. R7 is the stack pointer, used implicitly in exception handling and subroutine calls.  HD6435368RCP_1174460  can be esignated by the name SP, which is synonymous with R7.  As indicated in figure 3-3, it points to he top of the stack. HD6435368RCP_1174460 is also used implicitly by the LDM and STM instructions, which load and tore multiple registers from and to the stack and pre-decrement or post-increment R7 accordingly.
R6 functions as a frame pointer (FP).  The LINK and UNLK instructions use R6 implicitly to eserve or release a stack frame.