Features: The H8S/2000 CPU has the following features.
• Upward-compatible with H8/300 and H8/300H CPUs
Can execute H8/300 and H8/300H object programs
• General-register architecture
Sixteen 16-bit general registers (also usable as sixteen 8-bit registers or eight 32-bit
registers)
• Sixty-five basic instructions
8/16/32-bit arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
• Eight addressing modes
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @ERn]
Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
• 16-Mbyte address space
Program: 16 Mbytes
Data: 16 Mbytes (4 Gbytes architecturally)
• High-speed operation
All frequently-used instructions execute in one or two states
Maximum clock rate : 20 MHz
8/16/32-bit register-register add/subtract : 50 ns
8 * 8-bit register-register multiply : 600 ns
16 ÷ 8-bit register-register divide : 600 ns
16 * 16-bit register-register multiply : 1000 ns
32 ÷ 16-bit register-register divide : 1000 ns
• Two CPU operating modes
Normal mode (Supported on ZTAT, mask ROM, and ROMless versions only)
Advanced mode
• Power-down state
Transition to power-down state by SLEEP instruction
CPU clock speed selectionSpecifications
| Item |
Symbol |
Value |
Unit |
| Power supply voltage |
VCC |
0.3 to +7.0 |
V |
| Input voltage (FWE)*1 |
Vin |
0.3 to VCC +0.3 |
V |
| Input voltage (except port 4) |
Vin |
0.3 to VCC + 0.3 |
V |
| Input voltage (port 4) |
Vin |
0.3 to AVCC + 0.3 |
V |
| Reference voltage |
Vref |
0.3 to AVCC + 0.3 |
V |
| Analog power supply voltage |
AVCC |
0.3 to +7.0 |
V |
| Analog input voltage |
VAN |
0.3 to AVCC + 0.3 |
V |
| Operating temperature |
Topr |
Regular specifications: 20 to +75*2 |
|
| Wide-range specifications: 40 to +85*2 |
| Storage temperature |
Tstg |
55 to +125 |
|
Caution: Permanent damage to the chip may result if absolute maximum rating are exceeded.
Notes: 1. Never apply 12 V to any of the pins. Doing so could permanently damage the LSI.
2. The operating temperature range for flash memory programming/erase operations is Ta = 0 to +75°C (regular specifications), Ta = 0 to +85°C (wide-range specifications).
DescriptionThe H8S/2345 Group is a series of microcomputers (MCUs: microcomputer units), built around the H8S/2000 CPU, employing Renesas' proprietary architecture, and equipped with peripheral functions on-chip.
The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general registers and a concise, optimized instruction set designed for high-speed operation, and can address a 16-Mbyte linear address space. The instruction set is upward-compatible with H8/300 and H8/300H CPU instructions at the object-code level, facilitating migration from the H8/300,H8/300L, or H8/300H Series.
On-chip peripheral functions required for system configuration include data transfer controller (DTC) bus masters, ROM and RAM, a 16-bit timer-pulse unit (TPU), an 8-bit timer, a watchdog timer (WDT), a serial communication interface (SCI), an A/D converter, a D/A converter, and I/O ports. The H8S/2000 on-chip ROM*1 is either single power supply flash memory (F-ZTAT™*2), PROM (ZTAT®*2), or mask ROM, with a capacity of 128, 96, 64, or 32 kbytes. ROM is connected to the CPU via a 16-bit data bus, enabling both byte and word data to be accessed in one state.
Instruction fetching has been speeded up, and processing speed increased.Seven operating modes, modes 1 to 7, are provided, and there is a choice of address space and single-chip mode or external expansion mode.The features of the H8S/2000 Group are shown in table 1.1.
HD6432345 Data Sheet
