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HCTS240AMS

Features: 3 Micron Radiation Hardened CMOS SOSTotal Dose 200K RAD (Si)SEP Effective LET No Upsets: >100 MEV-cm2/mgSingle Event Upset (SEU) Immunity < 2 x 10-9Errors/Bit-Day (Typ)Dose Rate Survivability: >1 x 1012 RAD (Si)/sDose Rate Upset >1010 RAD (Si)/s 20ns PulseLatch-Up Free Under ...

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SeekIC No. : 004359944 Detail

HCTS240AMS: Features: 3 Micron Radiation Hardened CMOS SOSTotal Dose 200K RAD (Si)SEP Effective LET No Upsets: >100 MEV-cm2/mgSingle Event Upset (SEU) Immunity < 2 x 10-9Errors/Bit-Day (Typ)Dose Rate Surv...

HCTS240AMS Data Sheet

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Part Number:
HCTS240AMS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm2/mg
Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ)
Dose Rate Survivability: >1 x 1012 RAD (Si)/s
Dose Rate Upset >1010  RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55to +125
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
 - VIL = 0.8V Max
 - VIH = VCC/2 Min
Input Current Levels Ii 5A at VOL, VOH


Pinout

Connection Diagram


Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . .. . . . . .±35mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . . -65 to +150
Lead Temperature (Soldering 10sec). . . . . . . . . . . . .. . . . . . +265
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . .  . . . . . . . +175
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . Class 1
Thermal Resistance                                                JA               JC
   SBDIP Package. . . . . . . . . . . . . . . . . . . . .  . . . . . . 72/W 24/W
   Ceramic Flatpack Package . . . . . . . . . . . . .  .. . . 107/W 28 /W
Maximum Package Power Dissipation at +125 Ambient
   SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.69W
   Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . .0.47W
If device power exceeds package dissipation capability, provide heat
sinking or derate linearly at the following rate:
   SBDIP Package. . . . . . . . . . . . . . . . . . . . .  .   . . .. . . . . .13.9mW/
   Ceramic Flatpack Package . . . . . . . . . . . . . .  . . .  . . . . . .9.3mW/


Description

The Intersil HCTS240AMS is a Radiation Hardened inverting octal buffer/line driver, three-state, with two active low output enables (1OE , 2OE ). 1OE  controls outputs 1Yn, 2OE  controls outputs 2Yn.


The HCTS240AMS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family .


The HCTS240AMS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).




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