HCTS20MS

Features:

3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm2/mg
Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 1012 RAD (Si)/s
Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55oC to +125oC
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii £ 5mA at VOL, VOH




Pinout






Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . .. -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . .. . . . .. . . . .. .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . .. .. .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . .. . . . -65oC to +150oC
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . .+175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Class 1




Description

The Intersil HCTS20MS is a Radiation Hardened Dual 4-Input NAND Gate. A low on any input forces the output to a High state. The HCTS20MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. It is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).