HCTS193MS

Features:

• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/Bit- Day (Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55 to +125
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii 5µA at VOL, VOH




Pinout






Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . .. . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . .. . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 to +150
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . +265
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . +175
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1




Description

The Intersil HCTS193MS is a Radiation Hardened 4-bit binary UP/DOWN synchronous counter. Presetting the counter to the number on the preset data inputs (P0 - P3) is accomplished by a low on the asynchronous parallel load input (PL). The counter is incremented on the low to high transition of the clock-up input (high on the clock-down), decremented on the low to high transition of the clock-down input (high on the clock-up). A high level on the MR input overrides any other input to clear the counter to zero. The Terminal Count Up goes low half a clock period before the zero count is reached and returns high at the maximum count. The Terminal Count Down mode goes low half a clock period before the maximum count and returns high at the maximum count. The HCTS193MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS193MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).