HCS373MS

Features: • 3 Micron Radiation Hardened CMOS SOS• Total Dose 200K RAD (Si)• SEP Effective LET No Upsets: >100 MEV-cm2/mg• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ)• Dose Rate Survivability: >1 x 1012 RAD (Si)/s• Dose Rate Upset ...

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HCS373MS Picture
SeekIC No. : 004359859 Detail

HCS373MS: Features: • 3 Micron Radiation Hardened CMOS SOS• Total Dose 200K RAD (Si)• SEP Effective LET No Upsets: >100 MEV-cm2/mg• Single Event Upset (SEU) Immunity < 2 x 10-9 E...

floor Price/Ceiling Price

Part Number:
HCS373MS
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit- Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55 to +125
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii 5µA at VOL, VOH



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . .±10mA
DC Drain Current, Any One Output. . . . . . . . . . . . . . . . .. . .±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 to +150
Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . +265
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . .. . . . +175
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . Class 1



Description

The Intersil HCS373MS is a Radiation Hardened octal transparent three-state latch with an active-low output enable. The HCS373MS utilizes advanced CMOS/SOS technology. The outputs are transparent to the inputs when the Latch Enable (LE) is HIGH. When the Latch Enable (LE) goes LOW, the data is latched. The Output Enable (OE) controls the three-state outputs. When the Output Enable (OE) is HIGH, the outputs are in the high impedance state. The latch operation is independent of the state of the Output Enable. The HCS373MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS373MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).


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