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HCC/HCF4502B

PinoutSpecifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC TypesHCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V II DC Input Current (any one input) ± 10 mA Pt ot Total Power Dissipation (per package...

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SeekIC No. : 004359489 Detail

HCC/HCF4502B: PinoutSpecifications Symbol Parameter Value Unit VDD* Supply Voltage :HCC TypesHCF Types 0.5 to + 20 0.5 to + 18 VV Vi Input Voltage 0.5 to VDD + 0.5 V ...

HCC/HCF4502B Data Sheet

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Part Number:
HCC/HCF4502B
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/31

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Product Details

Description



Pinout

Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VDD*
 Supply Voltage :HCC Types
HCF Types
0.5 to + 20
0.5 to + 18
V
V
Vi
 Input Voltage
0.5 to VDD + 0.5
V
II
 DC Input Current (any one input)
± 10
mA
Pt ot
 Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top = Full Package-temperature Range
200
100
mW
mW
Pt ot
 Operating Temperature : HCC Types
HCF Types
55 to + 125
40 to + 85
°C
°C
Ts tg
 Storage Temperature
65 to + 150
°C
°C
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to VSS pin voltage.


Description

The HCC4502B (extended temperature range) and HCF4502B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic  micro package. The HCC4502B consists of six inverter-buffers with 3-state outputs. A logic "1" on the OUTPUT DISABLE input produces a highimpedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying  system design. Alogic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B" series IOL standard.




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