HCC/HCF4046B

Features:

`QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
`VERY LOW POWER CONSUMPTION : 100mW (TYP.) AT V_CO fo = 10kHz, V_DD = 5V
`OPERATING FREQUENCY RANGE : UP TO 1.4MHz (TYP.) AT V<sub>DD</sub> = 10V
`LOWFREQUENCY DRIFT : 0.06%/°C (typ.) AT V_DD = 10V
`CHOICE OF TWO PHASE COMPARATORS : 1) EXCLUSIVE - OR NETWORK 2) EDGE-CONTROLLEDMEMORY NETWORK
`WITH PHASE-PULSE OUTPUT FOR LOCK INDICATION HIGH VCO LINEARITY : 1% (TYP.)
`VCO INHIBIT CONTROL FOR ON-OFF KEYING AND ULTRA-LOW STANDBY POWER CONSUMPTION
`SOURCE-FOLLOWER OUTPUT OF VCO CONTROL INPUT (demod. output)
`ZENER DIODE TO ASSIST SUPPLY REGULATION
`5V, 10V AND 15V PARAMETRIC RATING
`INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE
`100% TESTEDFOR QUIESCENT CURRENT
`MEETSALLREQUIREMENTSOFJEDECTENTATIVE STANDARD N°. 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"


Pinout




Specifications

Symbol	Rating	Value	Unit
VDD*	Supply Voltage : HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85	°C °C
Tstg	Storage Temperature	65 to + 150	°C

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to V_SS pin voltage.


Description

The HCC/HCF4046B are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package. The HCC/HCF4046B COS/MOS Micropower Phase- Locked Loop (PLL) consists of a low-power, linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input. A 5.2V zener diode is provided for supply regulation if necessary.