HCC/HCF4043B

Features:

·QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE
·3-LEVEL OUTPUTS WITHCOMMON OUTPUT ENABLE SEPARATE
·SET AND RESET INPUT FOR EACH LATCH
·5V, 10V, AND 15V PARAMETRIC RATINGS
·NOR AND NAND CONFIGURATIONS
·INPUT CURRENT OF 100nA AT 18V AND 25°C FOR HCC DEVICE
·100% TESTEDFOR QUIESCENT CURRENT
·MEETSALLREQUIREMENTSOFJEDECTENTATIVESTANDARDN° 13A, "STANDARD SPECIFICATIONS FOR DESCRIPTION OF "B" SERIESCMOS DEVICES"

Pinout




Specifications

Symbol	Rating	Value	Unit
VDD*	Supply Voltage : HCC Types HCF Types	0.5 to + 20 0.5 to + 18	V V
Vi	Input Voltage	0.5 to VDD + 0.5	V
II	DC Input Current (any one input)	± 10	mA
Ptot	Total Power Dissipation (per package) Dissipation per Output Transistor for Top = Full Package-temperature Range	200 100	mW mW
Top	Operating Temperature : HCC Types HCF Types	55 to + 125 40 to + 85	°C °C
Tstg	Storage Temperature	65 to + 150	°C

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliabili ty.
* All voltage values are referred to V_SS pin voltage.


Description

The HCC/HCF4043B are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. The HCC/HCF4043B types are quad crosscoupled 3-state COS/MOS NOR latches and the HCC/HCF4044B types are quad cross-coupled 3- state COS/MOS NAND latches. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic "1" or "high" on the ENABLE input connects the latch states to the Q outputs. A logic "0" or "low" on the ENABLE input disconnects the latch states from the Q outputs, resulting in an open circuit condition on the Q outputs. The open circuit of HCC/HCF4043B feature allows common bussing of the outputs